Index of /HEAD/ports/cad

[ICO]NameLast modifiedSize

[PARENTDIR]Parent Directory  -
[   ]Makefile2020-02-03 01:16 2.7K
[DIR]NASTRAN-95/2019-07-27 06:53 -
[DIR]PrusaSlicer/2020-01-25 06:52 -
[DIR]abc/2019-04-10 01:13 -
[DIR]admesh/2019-11-01 06:52 -
[DIR]adms/2017-04-23 00:55 -
[DIR]alliance/2019-10-08 01:20 -
[DIR]astk-client/2014-03-19 07:11 -
[DIR]astk-serveur/2019-12-28 06:52 -
[DIR]atlc/2016-01-13 06:51 -
[DIR]basicdsp/2019-07-27 06:53 -
[DIR]brlcad/2019-11-11 01:12 -
[DIR]calculix-ccx/2020-01-31 01:16 -
[DIR]calculix/2020-01-23 06:52 -
[DIR]caneda/2019-11-22 01:17 -
[DIR]cascade-compiler/2020-01-07 01:20 -
[DIR]cascade/2017-05-30 01:14 -
[DIR]chipvault/2014-01-23 03:36 -
[DIR]cura-engine/2019-07-27 06:53 -
[DIR]digital/2019-07-23 06:52 -
[DIR]dinotrace/2020-01-08 01:21 -
[DIR]electric-ng/2019-11-28 01:17 -
[DIR]electric/2017-11-10 01:02 -
[DIR]fasm/2019-10-28 01:16 -
[DIR]feappv/2019-11-06 01:16 -
[DIR]fidocadj/2019-11-28 01:17 -
[DIR]freecad/2020-01-19 01:17 -
[DIR]freehdl/2019-07-27 06:53 -
[DIR]fritzing/2019-12-12 06:52 -
[DIR]gdsreader/2014-08-31 05:07 -
[DIR]gdt/2017-01-21 06:51 -
[DIR]geda/2019-11-09 01:17 -
[DIR]gerbv/2020-01-06 01:20 -
[DIR]ghdl/2019-10-24 01:17 -
[DIR]gmsh/2020-01-31 01:16 -
[DIR]gnucap/2018-10-28 01:16 -
[DIR]gplcver/2019-06-20 01:16 -
[DIR]gspiceui/2019-07-27 06:53 -
[DIR]gtkwave/2019-11-01 06:52 -
[DIR]impact/2019-11-28 01:17 -
[DIR]irsim/2019-11-06 01:16 -
[DIR]iverilog/2019-08-19 01:10 -
[DIR]jspice3/2019-11-08 06:52 -
[DIR]k40-whisperer/2020-02-12 01:19 -
[DIR]kicad-devel/2020-01-19 06:52 -
[DIR]kicad-doc/2019-11-29 01:16 -
[DIR]kicad-library-footprints-devel/2020-01-19 06:52 -
[DIR]kicad-library-footprints/2019-11-29 01:16 -
[DIR]kicad-library-packages3d-devel/2020-01-19 06:52 -
[DIR]kicad-library-packages3d/2019-11-29 01:16 -
[DIR]kicad-library-symbols-devel/2020-01-19 06:52 -
[DIR]kicad-library-symbols/2019-11-29 01:16 -
[DIR]kicad-library-templates-devel/2019-11-23 06:52 -
[DIR]kicad-library-templates/2019-11-29 01:16 -
[DIR]kicad/2019-12-12 06:52 -
[DIR]klayout/2019-07-27 06:53 -
[DIR]ktechlab/2020-01-20 01:16 -
[DIR]ldraw/2019-09-06 01:17 -
[DIR]leocad/2019-09-06 01:17 -
[DIR]lepton-eda/2020-01-02 06:52 -
[DIR]libopencad/2020-01-16 01:17 -
[DIR]librecad/2019-12-12 06:52 -
[DIR]libredwg/2020-01-11 01:19 -
[DIR]librepcb/2019-12-02 06:52 -
[DIR]linux-eagle5/2018-05-08 01:12 -
[DIR]linuxcnc-devel/2020-02-19 06:52 -
[DIR]logisim/2019-11-28 01:17 -
[DIR]magic/2019-11-06 01:16 -
[DIR]meshdev/2016-05-20 01:11 -
[DIR]netgen/2019-11-25 01:15 -
[DIR]ngspice_rework/2019-11-02 06:52 -
[DIR]nvc/2019-10-24 01:17 -
[DIR]opencascade/2019-12-27 06:52 -
[DIR]openscad-devel/2020-01-13 06:52 -
[DIR]openscad/2019-12-12 06:52 -
[DIR]openvsp/2020-01-04 01:21 -
[DIR]oregano/2020-01-26 01:17 -
[DIR]p5-GDS2/2018-05-28 06:54 -
[DIR]p5-Verilog-Perl/2020-02-17 01:14 -
[DIR]pcb/2019-11-06 01:16 -
[DIR]pdnmesh/2020-01-31 01:16 -
[DIR]py-gdspy/2019-07-27 06:53 -
[DIR]py-lcapy/2019-07-27 06:53 -
[DIR]py-phidl/2019-07-27 06:53 -
[DIR]py-pycam/2020-02-20 06:52 -
[DIR]py-pyfda/2019-07-27 06:53 -
[DIR]python-gdsii/2019-02-01 01:17 -
[DIR]qcad/2020-01-20 06:52 -
[DIR]qelectrotech/2019-11-06 01:17 -
[DIR]qmls/2014-01-23 03:35 -
[DIR]repsnapper/2019-11-06 01:17 -
[DIR]rubygem-gdsii/2016-05-17 06:50 -
[DIR]scotch/2020-01-16 06:52 -
[DIR]solvespace/2019-11-06 01:17 -
[DIR]sp2sp/2019-11-09 01:17 -
[DIR]spice/2019-11-08 06:52 -
[DIR]stepcode/2020-02-06 01:13 -
[DIR]sumo/2020-01-23 01:16 -
[DIR]sweethome3d/2019-11-28 01:17 -
[DIR]tkgate/2019-11-09 01:17 -
[DIR]tochnog/2019-07-27 06:53 -
[DIR]transcalc/2019-11-09 01:17 -
[DIR]varkon/2019-11-06 01:17 -
[DIR]verilator/2020-02-13 01:21 -
[DIR]verilog-mode.el/2020-01-08 01:21 -
[DIR]veroroute/2020-02-18 06:52 -
[DIR]xcircuit/2019-12-04 01:14 -
[DIR]yosys/2020-01-05 06:52 -
[DIR]z88/2020-01-01 01:24 -
[DIR]zcad/2020-01-01 01:24 -